Cadence and Advantest to Target Auto IC Test

December 12th, 2006

Cadence and Advantest recently announced a partnership to deliver a methodology for zero-defect testing of digital automotive electronics. If successful, the partnership will enable faster time-to-market and more complete testing of complex digital devices for new automobiles.

Using Advantest’s automated test equipment (ATE) platforms, the collaboration combines traditional analog part average testing (PAT) techniques with the industry leading small delay defect detection capabilities of the Cadence ® Encounter® True-Time Test software to produce a new generation of single-pass test methodologies for zero-defect testing of digital parts.

Cadence Encounter Test, a key component of the Cadence Encounter digital IC design platform, delivers the industry’s most advanced test solution from RTL to silicon. Key technologies include Power-Aware ATPG methods to reduce power during test, test-data compression to lower cost of test, True-Time delay test to detect small delay defects. In combination, with Encounter Diagnostics for accelerated yield ramp, these technologies provide the highest quality of shippable silicon.

For more information, go to the Advantest website or the Cadence website.

Entry Filed under: Business News, Electronics Test